EDN

Targeting Floating-Point Algorithms for FPGA or ASIC Deployment

Native Floating-Point HDL code generation allows you to generate VHDL or Verilog for floating-point implementation in hardware without the effort of fixed-point conversion. Native Floating-Point HDL ...
EDN

Fixed-Point DSP and Algorithm Implementation

[Editor's note: For an intro to floating-point math, see Tutorial: Floating-point arithmetic on FPGAs. For a comparison of fixed- and floating-point hardware, see Fixed vs. floating point: a ...
Electronic Design

What’s the Difference Between Fixed-Point, Floating-Point, and Numerical Formats?

Embedded C and C++ programmers are familiar with signed and unsigned integers and floating-point values of various sizes, but a number of numerical formats can be used in embedded applications. Here ...