IEEE

Designing of AES-128 Encryption Algorithm Using System Verilog VLSI

Abstract: This paper details a comprehensive study on the implementation of the Advanced Encryption Standard (AES) using Very Large Scale Integration (VLSI) technology for the purpose of creating ...
IEEE

Large-Spacing Scanning Phased Array with U-Slot Patch Antennas Using Genetic Algorithm ...

Abstract: This paper proposes a large-spacing scanning phased array based on U-slot patch antennas. A genetic algorithm is used to optimize the beamforming for a $1 \times 5$ subarray. And taking into ...